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[Crack Hack] lfsr

Description: 伪随机序列产生器－线性反馈移位寄存器，Verilog HDL 原代码。-Pseudo-random sequence generator- linear feedback shift register, Verilog HDL source code.
Platform: | Size: 1024 | Author: 李辛 | Hits:

[VHDL-FPGA-Verilog] VerilogHDLDigitalControlSystemExample

Description: 《Verilog HDL数字控制系统设计实例》-冼进-源代码- Verilog HDL Digital Control System Design - Xian Jin- source code
Platform: | Size: 11381760 | Author: 王洪亮 | Hits:

[VHDL-FPGA-Verilog] Verilog_HDL_language_learning

Description: Verilog HDL语言练习与讲解 里面有很多实用的源代码-Verilog HDL language exercises on the inside and have a lot of useful source code
Platform: | Size: 265216 | Author: 李晓东 | Hits:

[VHDL-FPGA-Verilog] Verilogtextbook

Description: Verilog HDL的入门书籍，老外写的，语言简洁，是快速掌握Verilog编程的好教材，大家可以学习下-Verilog under the principle of serial communication, including receiving and sending the code. Through simulation, are a good example of Verilog study.
Platform: | Size: 5348352 | Author: clins | Hits:

[VHDL-FPGA-Verilog] SPI_verilog_mycode

Description: 基于Verilog HDL的SPI代码，可在FPGA上实现SPI接口，请大家参考-Verilog HDL based on the SPI code, implementation in FPGA on SPI interface, please refer to
Platform: | Size: 1024 | Author: treefan.liang | Hits:

[VHDL-FPGA-Verilog] 16bitCLA

Description: 基于Verilog HDL的16位超前进位加法器 分为3个功能子模块-Verilog HDL-based 16-bit CLA is divided into three functional sub-modules
Platform: | Size: 7168 | Author: 韩伟 | Hits:

[Other] i2s_rel1_2

Description: I2S verilog HDL code including test environment
Platform: | Size: 274432 | Author: richman | Hits:

[VHDL-FPGA-Verilog] I2CVerilog

Description: I2C 控制器的 Verilog源程序, 适用于FPGA等应用领域-I2C controller Verilog source code,I2C controller Verilog source code
Platform: | Size: 10240 | Author: babylu | Hits:

[Embeded-SCM Develop] i2_cmaster

Description: verilog HDL i2c主机代码-verilog HDL i2c host code
Platform: | Size: 1024 | Author: 李爱国 | Hits:

[VHDL-FPGA-Verilog] async_fifo

Description: verilog HDL写的异步fifo代码及测试平台，直接可用，可生成RTL代码-asynchronous fifo write verilog HDL code and test platform, directly available, can generate RTL code for
Platform: | Size: 62464 | Author: 张晗 | Hits:

[VHDL-FPGA-Verilog] usartverilogydm

Description: verilog hdl在FPGA设计中广泛应用，好的程序代码是学习verilog的好帮手-verilog hdl widely used in the FPGA design, a good code is a good helper to learn verilog
Platform: | Size: 315392 | Author: 翁志能 | Hits:

[VHDL-FPGA-Verilog] controller

Description: PI controller and its source code
Platform: | Size: 2048 | Author: sanjivkumar | Hits:

[VHDL-FPGA-Verilog] SDRAMverilog

Description: SDRAM 驱动，Verilog HDL源码-SDRAM-driven, Verilog HDL source code
Platform: | Size: 297984 | Author: 刘越 | Hits:

[VHDL-FPGA-Verilog] SRAM_Proj

Description: SRAM 读写VERILOG HDL源码-SRAM read and write VERILOG HDL source code
Platform: | Size: 2492416 | Author: 杨先生 | Hits:

[VHDL-FPGA-Verilog] ds18b20

Description: 单路DS18B20的verilog HDL 代码，精度为1℃无须转换数据，直接输出结果。占用300个LE资源。-Single DS18B20 the verilog HDL code, and an accuracy of 1 ℃ without converting the data, direct output. Occupy 300 LE resources.
Platform: | Size: 443392 | Author: chenwl | Hits:

[VHDL-FPGA-Verilog] clock

Description: verilog hdl代码 实现显示在数码管上显示时间，日期-verilog hdl code to achieve control in the digital display shows time, date. .
Platform: | Size: 2048 | Author: Along | Hits:

[VHDL-FPGA-Verilog] AHBtoAPB

Description: amba总线桥:ahb to asb!verilog hdl文档加代码，非常全，soc-amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc
Platform: | Size: 165888 | Author: zhangyiyun | Hits:

[VHDL-FPGA-Verilog] RS-code

Description: 我测试过的！Verilog HDL实现RS编码。-I' ve tested it! RS coding Verilog HDL implementation.
Platform: | Size: 983040 | Author: kiekie | Hits:

[Crack Hack] DES_Encrypt_Decrypt_Verilog

Description: DES加密算法的Verilog HDL实现，带模式选择端口，可以实现加密和解密，已经modelsim仿真通过。-Des En/Decrypt,Verilog HDL code
Platform: | Size: 8192 | Author: Amazing_Eric | Hits:

[VHDL-FPGA-Verilog] 1212

Description: VERILOG+HDL硬件描述语言实现电话计费系统，实践代码。-VERILOG+ HDL hardware description language telephone billing system, practice code.
Platform: | Size: 4096 | Author: | Hits:
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